Lamb Labs is building MPUs (Model Processing Units). We hardcode the entire model, including its weights, into silicon. The model is the chip. This solves the memory-bandwidth bottleneck GPUs face, targeting 20,000+ tokens per second and 63× higher intelligence per watt. Backed by Y Combinator.
Fast inference is a full-stack problem. We get more useful tokens out of today’s GPUs, then carry the same obsession with speed and efficiency down into FPGA fabric and custom silicon.
Woolly is our post-trained Qwen model, optimized to be smaller and faster so the whole model can fit on-chip. Our public demo lets you compare its text, latency, and throughput side by side with the original Qwen3-8B. Try Woolly live.
We turn models into dedicated compute and memory layouts instead of moving every weight through a general-purpose stack. Little Lamb is our smallest end-to-end proof: a model generating text entirely inside FPGA fabric. Try Little Lamb live.
We post-trained Qwen to be smaller and faster, focusing the model around one hardware constraint: fitting entirely on-chip. Keeping the model close to compute removes weight movement and makes inference faster. The live demo shows the difference prompt by prompt. Try Woolly live.
We compile the model into custom accelerator logic. Our first prototype runs today on an off-the-shelf Kria KV260 board: an 8B-parameter model under 10 W, less power than a lightbulb. This board is the proof that the architecture maps to hardware.
We trained a tiny language model from scratch, then burned its weights into FPGA fabric. It generates every token on a $250 Kria KV260 with all weights resident in on-chip memory and no DRAM in the token loop. It is deliberately tiny; the point is a live, end-to-end proof that a self-trained model can run entirely on-chip. At 12,000 tokens per second, the FPGA can execute 200 token steps during one 16.7 ms refresh interval; the live demo's full 64-token reply takes about 5.3 ms. Try Little Lamb live.
Custom silicon for each model, its architecture hard-coded on-chip. Our target: tape out a chip that reaches 20,000+ tokens per second at 63× higher intelligence per watt than today’s best AI accelerators. Our RL environment searches chip designs for the best speed and energy per token.
Email contact@lamb-labs.com, or see our RL chip-design environment.